Exploring ultrasparc t2 processor parallel processing capabilities in video streams javier iparraguirre1. The demand for network services continues to rise while it budgets and resources remain limited. Architecture of the ultrasparc t2 processor youtube. The ultrasparc t2 codenamed niagara 2 contains up to eight processor cores, which are able to execute 8 threads simultaneoulsy each. Sun sparc enterprise t rackmountable ultrasparc t1 1 ghz 4 gb 250 gb overview and full product specs on cnet. Sun started selling servers with the t2 processor in october 2007. Ultrasparc iii upa64 ultrasparc 3 ultrasparc sun ultrasparc ultrasparc iii text. Opensparc t1 processor design and verification users guide. Sun ultrasparc t1 processor with eight cores and four threads per core, power consumption of the chip is less than 70 watts.
It is a member of the sparc family, and the successor to the ultrasparc t1. Opensparc t1 microarchitecture specification 1 no es posible. The ultrasparc iii processor incorporates a cpu, pci bus interface, and memory controller to deliver. But for future reference if anyone else needs this information, when removing the case of the ultra 5, on the side of the processors heatsink facing the side of the box, the processor part number is the first 7 digits on the orange sticker with the barcode. Security was builtin from the very first release on silicon, with hardware cryptographic units in the t1, unlike contemporary general purpose processor from competing vendors. Designed to meet the most demanding telecommunication web. Sparc refers to an abstract processor design specification. Nvram for sun ultrasparc iii datasheet, cross reference, circuit and application notes in pdf format. The ultrasparc t1 processor with coolthreads technology was the highestthroughput and most ecoresponsible processor ever created when it became available in the ultrasparc t1 system. Sun microsystems, inc 15, business spa r c technology m ay 1995 ultrasparc 1 data sheet in t r o d u c t io n, o n e n t o v e r v i e w in a single chip implementation, the ultrasparc 1 processor integrates, dynamic branch prediction scheme is implemented in sun microsystems, inc 2 prelim inary, units in the fpu allows ultrasparc 1 to. Thus, within a single processor chip 64 processes can operate on eight 8stage. It comes with significantly enhanced cores, 2 mb onchip l2 cache, and an offchip 32 mb l3 cache. We delete comments that violate our policy, which we encourage you to read. Ultrasparct2plus processors have one fp unit per core.
The ultrasparc t1 processor combines eight 4threaded 64b cores, a high bandwidth interconnect crossbar, a shared 3mb l2 cache and four doublewidth. Pdf 64bit 333mhz 270mhz256kb, 300mhz512kb, 333mhz2mb. The ultrasparc t1 was designed from scratch as a multithreaded, specialpurpose processor, and thus introduces a whole new architecture for obtaining high performance. Together with the solaris os, the ultrasparc t1 processor provides an. Exploring ultrasparc t2 processor parallel processing.
Presented by denis sheahan, distinguished engineer, niagara architecture group, sun microsystems, this presentation provides and overview of the ultrasparc t2 processor architecture. The ultrasparc t1 processor power efficient throughput. Slide 1 ultrasparc t1 the processor formerly known as niagara this work supported by unsw and hp through the gelato federation slide 2 sparc history scalable processor architecture 1985 sun microsystems. Internally, it implements two modified ultrasparc iii cores, and its physical packaging is identical to the ultrasparc iii with the exception of one pin. The chip is sometimes referred to by its codename, niagara 2. You receive the following message after the first operation that cannot be performed dynamically on any device or for any service on the primary domain if you are using a server with a sun ultrasparc t2 or t2 plus processor.
Ultrasparct1 processors plow through parallel processing with lots of threads think java enterprise apps well, due to their many cores and register windows, but dont have nearly as much floating point power as sparc iv or intel, since all 8 or 10 cores share only one floating point unit. Ultrasparc t2 supports concurrent execution of 64 threads by utilizing eight sparc cores, each. In this study, we analyze sources of os noise on a massive multithreading processor, the sun ultrasparc t1. Cpu processors free delivery possible on eligible purchases. And theres also a number of testimonials from customers. The ultrasparc iv was the first multicore sparc processor, released in march, 2004. Pbn001403 sun ultrasparc t1 ultrasparciii upa64 ultrasparc 3 ultrasparc sun ultrasparc ultrasparc iii. Pdf a dualcore 64bit ultrasparc microprocessor for. Architectural details of the ultrasparc t2 processor hpc.
Rather than try to make each core as intelligent and optimized as they can, suns goal was to run as many concurrent threads as possible, and maximize utilization of each cores. Feature ultrasparc t1 processor ultrasparc t2 processor ultrasparc t2 plus processor cores per processor up to 8 up to 8 up to 8 threads per core 4 8 8 threads per processor 32 64 64 hypervisor yes yes yes sockets supported 1 1 2 or. Ultrasparc 5 processor identification oracle community. Opensparc t1 is the open source version of the ultrasparc t1 processor. The ultrasparc t1 processor high bandwidth for throughput computing 3 1. Sun ultrasparc t1 1 ghz processor sign in to comment. The ultrasparc t1 processor with coolthreads technology is the highestthroughput and most ecoresponsible processor ever created.
Each core equates to a 64bit execution pipeline capable of running four threads. Opensparc t1 is the open source version of the ultrasparc t1 processor, a multicore, 64bit multiprocessor. In terms of the benchmark numbers i think its important to see that the processor does well on commercial workloads, but also does well on spec cpu2006 rate, both floating point and integer. Sun sparc enterprise t5440 server architecture white paper. The result is that the 8core processor handles up to 32 active threads concurrently. Sun microsystems ultrasparc t2 microprocessor is a multithreading, multicore cpu. It delivers twice the throughput performance of the first generation ultrasparc t1 processor in essentially the same power. The ultrasparc iii, codenamed cheetah, is a microprocessor that implements the sparc v9 instruction set architecture isa developed by sun microsystems and fabricated by texas instruments. Space efficient, rackoptimized 1u form factor for horizontally scaled environments. Ibm continues to define a processor, for purposes of pvubased licensing, to. Implementors will take the sparc architecture and turn it into an actual hardware. Oracle white paper oracle sun sparc enterprise t5440 server architecture systems. The ultrasparc iii cores were improved in a variety of ways. Ultrasparc architecture 2005 819340402 pdf online opensparc t1 megacells opensparc t1 processor.
A highlythreaded, powerefficient, sparc soc manish shah, jama barreh, jeff brooks, robert golla, gregory grohoski, nils gura, rick hetherington, paul jordan. Opensparc t1 instruction set ultrasparc architecture 2005 specification 950489503 pdf online opensparc t1 processor internal registers ultrasparc t1 supplement to the ultrasparc architecture 2005 819340402 pdf online opensparc t1 processor jbus and ssi interfaces opensparc t1 processor external interface specification 818501410 pdf download. Sun microsystems ultrasparc t1 microprocessor, known until its 14 november 2005. Sun microsystems ultrasparc t1 microprocessor, known until its 14 november 2005 announcement by its development codename niagara, is a multithreading, multicore cpu. Ibm processor value unit pvu licensing for distributed. Ultrasparc t1 processor architecture sparc v9 architecture, ecc protected cache per 16 kb instruction processor 8 kb primary data cache 3 mb integrated l2 key ras features internal hardware drive mirroring raid 1 hotpluggable disk drives. A dualcore 64bit ultrasparc microprocessor for dense server applications. Sparc t41 server is the first sparc t4 processor based system with throughput offering 2x the io bandwidth and 5x improvement in single threaded performance over the previous generation netra sparc server, all in a compact 20 inch deep 2 ru chassis. First introduced with the ultrasparc t1 processor, chip multithreading cmt takes advantage of cmp advances but adds a critical capabilitythe ability to scale with threads rather than. Sun and ti release copper interconnectbased ultrasparc. Introduction suns ultrasparc t1, formerly known as niagara, is much more than just a new ultrasparc. Replace each large, superscalar processor with multiple. Continuous evolution in process technology brings energyefficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high bandwidth and capacity, global wires improve slowly, and more cells are susceptible to hard and soft errors.
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